by nexgentech | Oct 24, 2017 | ieee project
Stochastic Implementation and Analysis of Dynamical Systems Similar to the Logistic Map Abstract: Stochastic computing (SC) is a digital computation approach that operates on random bit streams to perform complex tasks with much smaller hardware footprints compared...
by nexgentech | Oct 24, 2017 | ieee project
Multicast-Aware High-Performance Wireless Network-on-Chip Architectures Abstract: Today’s multiprocessor platforms employ the network-on-chip (NoC) architecture as the preferable communication backbone. Conventional NoCs are designed predominantly for unicast data...
by nexgentech | Oct 24, 2017 | ieee project
A Fault Tolerance Technique for Combinational Circuits Based on Selective-Transistor Redundancy Abstract: With fabrication technology reaching nano-levels, systems are becoming more prone to manufacturing defects with higher susceptibility to soft errors. This paper...
by nexgentech | Oct 24, 2017 | ieee project
Soft Error Rate Reduction of Combinational Circuits Using Gate Sizing in the Presence of Process Variations Abstract: Soft errors in combinational logic circuits are emerging as a significant reliability concern for nanoscale VLSI designs. This paper presents a novel...
by nexgentech | Oct 24, 2017 | ieee project
High-Speed Parallel LFSR Architectures Based on Improved State-Space Transformations Abstract: Linear feedback shift register (LFSR) has been widely applied in BCH and CRC encoding. In order to increase the system throughput, the parallelization of LFSR is usually...
by nexgentech | Oct 24, 2017 | ieee project
A High-Speed and Power-Efficient Voltage Level Shifter for Dual-Supply Applications Abstract: This brief presents a fast and power-efficient voltage level shifting circuit capable of converting extremely low levels of input voltages into high output voltage levels....
