by nexgentech | Oct 23, 2017 | ieee project
Low-Complexity Digit-Serial MultiplierOverGF(2m)Based on Efficient Toeplitz Block Toeplitz Matrix–Vector ProductDecomposition Abstract: In this paper, we have shown that a regular Toeplitz matrix-vector product (TMVP) can be transformed into a Toeplitz block TMVP...
by nexgentech | Oct 23, 2017 | ieee project
Hybrid Hardware/Software Floating-PointImplementations for Optimized Areaand Throughput Tradeoffs Abstract: Hybrid floating-point (FP) implementations improve software FP performance without incurring the area overhead of full hardware FP units. The proposed...
by nexgentech | Oct 23, 2017 | ieee project
A Method to Design Single Error Correction Codes with Fast Decoding for a Subset of Critical Bits Abstract: Single error correction (SEC) codes are widely used to protect data stored in memories and registers. In some applications, such as networking, a few control...
by nexgentech | Oct 23, 2017 | ieee project
Energy-Efficient Reduce-and-Rank UsingInput-Adaptive Approximations Abstract: Approximate computing is an emerging design paradigm that exploits the intrinsic ability of applications to produce acceptable outputs even when their computations are executed...
by nexgentech | Oct 23, 2017 | ieee project
ENFIRE: A Spatio-Temporal Fine-GrainedReconfigurable Hardware Abstract: Field programmable gate arrays (FPGAs) are well-established as fine-grained reconfigurable computing platforms. However, FPGAs demonstrate poor scalability in advanced technology nodes due to the...
by nexgentech | Oct 23, 2017 | ieee project
RoBA Multiplier: A Rounding-Based ApproximateMultiplier for High-Speed yet Energy-EfficientDigital Signal Processing Abstract: In this paper, we propose an approximate multiplier that is high speed yet energy efficient. The approach is to round the operands to the...
