A Novel Nine-Level Inverter Employing One Voltage Source and Reduced Components as High Frequency AC Power Source
Abstract
Increasing demands for power supplies have contributed to the population of high frequency ac (HFAC) power distribution system (PDS), and in order to increase the power capacity, multilevel inverters (MLIs) frequently serving as the high-frequency (HF) source-stage have obtained a prominent development. Existing MLIs commonly use more than one voltage source or a great number of power devices to enlarge the level numbers, and HF modulation (HFM) methods are usually adopted to decrease the total harmonic distortion (THD). All of these have increased the complexity and decreased the efficiency for the conversion from dc to HF ac. In this paper, a nine-level inverter employing only one input source and fewer components is proposed for HFAC PDS. It makes full use of the conversion of series and parallel connections of one voltage source and two capacitors to realize nine output levels, thus lower THD can be obtained without HFM methods. The voltage stress on power devices is relatively relieved, which has broadened its range of applications as well. Moreover, proposed nine-level inverter is equipped with the inherent self-voltage balancing ability, thus the modulation algorithm gets simplified. The circuit structure, modulation method, capacitor calculation, loss analysis and performance comparisons are presented in this paper, and all the superior performances of proposed nine-level inverter are verified by simulation and experimental prototypes with rated output power of 200W. The accordance of theoretical analysis, simulation and experimental results confirms the feasibility of proposed nine-level inverter.
EXISTING SYSTEM:
HFAC PDS is usually composed of two stages: a high frequency (HF) multilevel inverter (MLI) or a resonant inverter as the source side and several ac/ac or ac/dc voltage regulation modules (VRMs) as the load side. In order to raise the power capacity, one of the most popular methods of the source side is to connect multiple resonant inverters in series or in parallel, while the control for the HF synchronizations of both amplitudes and phases will become extremely complicated. In contrast, using a HF MLI as the power source is a preferable solution with larger power capacity and lower switch stress. In HFAC PDS. a HF MLI is employed to transform the dc voltage source from the batteries, fuel cells or photovoltaic cells into a HF staircase output, and the more number of voltage levels is significant to decrease the total harmonic distortion (THD) and electromagnetic interference (EMI), thus simplifying the design of output filters. However, the level number is restricted by the complexity of the MLI. The output frequency of the HF inverter usually ranges from 400 Hz to 50 kHz . As a result, the HF modulation (HFM) methods represented by multicarrier phase disposition are no longer suitable, as the excessively high switching frequency and so-caused switching loss are unbearable for HF applications. In other words, the fundamental-frequency modulation (FFM) methods will have to be adopted in HF fields, and the further discussions are necessary to customize a HF MLI that can output sufficient number of voltage levels with a simplified structure to increase the efficiency and decrease the THD for HF applications
PROPOSED SYSTEM:
Seven-level PWM inverter was proposed in which three capacitors are connected in series and then paralleled with the dc source to obtain extra ±1/3V d c and ±2/3V d c voltage levels. However, the capacitor voltages are in unbalancing conditions, thus increasing the control complexity. Meanwhile, both topologies adopt the multicarrier modulation method to decrease the THD of the staircase outputs. The high switching frequency makes them unsuitable for HFAC PDS. A grid-connected converter topology was proposed with only one voltage source, a flying capacitor and eight switches. It can output nine levels exactly when the HF modulation strategy keeps the capacitor voltage at a desired level such as 1/3V d c , which is indeed difficult to be realized without any auxiliary charging circuit, and the literature merely presents the experimental results from a seven-level prototype. Moreover, the HF modulation has limited the proposed topology to low frequency (LF) occasions only. A series of step-up multilevel topologies was proposed based on switched-capacitor (SC) techniques. They can be used as HF power sources. However, more dc sources or more components are required to accomplish higher number of output voltage levels. The power switches in the backend H-bridges bear the sharply cumulative voltage levels from the SC frontends, and the extremely high voltage stress has limited their applicability to low input occasions only. In this paper, a nine-level inverter employing one voltage source and two capacitors is proposed for HFAC PDS. Compared with the aforementioned topologies, proposed inverter has more voltage levels with fewer components. Lower THD of output voltage is obtained and the voltage stress on the power switches in the back-stage is relatively relieved. More importantly, the inherent self-voltage balancing ability of the two capacitors has simplified the modulation algorithm.
CONCLUSION
In this paper, a novel nine-level inverter is proposed for HFAC PDS. Compared with the existing topologies, proposed topology can achieve nine-level staircase output with only one voltage source, fewer power devices and relatively less voltage stress. All these have enlarged its application scopes. Voltage balance problem is avoided by the inherent self-voltage balancing ability, which has simplified the modulation circuits or algorithms, and the lower THD of 3.13% is realized without using HFM methods. As a result, the switching loss is significantly reduced. The capacitor calculation and power loss analysis are conducted in this paper, and the comparisons with existing topologies further testify the superiority of proposed HF inverter. All the merits and the feasibility of proposed topology are evaluated by a simulation model and an experimental prototype with rate power of 200W, and their results illustrate that proposed inverter is a preferable topology to implement HF power source for HFAC PDS.
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