AN AC-DC LED DRIVER WITH A TWO PARALLEL INVERTED BUCK TOPOLOGY FOR REDUCING THE LIGHT FLICKER IN LIGHTING APPLICATIONS TO LOW-RISK LEVELS
ABSTRACT
This paper presents an ac-dc LED driver that consists of two parallel inverted buck converters. To buffer the twice-line-frequency energy, one inverted buck converter (also known as a floating buck converter) conveys energy to a storage capacitor, simultaneously performing the power factor correction (PFC). The other inverted buck converter regulates the LED current to maintain a constant brightness in the LEDs for reducing light flicker to low-risk levels. The proposed architecture reduces the voltage stress and the size of the storage capacitor, enabling the use of a film capacitor instead of an electrolytic capacitor. Considering the power factor and the flicker standards, a design procedure to achieve a high power factor, while minimizing the storage capacitance and the LED current ripple, is presented. A prototype of the proposed LED driver has been implemented with an on-chip controller IC fabricated in a 0.35 µm CMOS process and its functionality and performance have been verified experimentally. It demonstrates a power factor of 0.94 and a peak power efficiency of 85.4% with an LED current ripple of 6.5%, while delivering 15 W to the LEDs.
EXISTING SYSTEM:
The input power (P in ) at twice the line frequency has a pulsating waveform that periodically changes above or below the constant output power (P o ). Hence, a storage capacitor as an energy buffer is required to balance out the instantaneous power differences between P in and P o . Fig. 3 illustrates the architecture of a conventional two-stage ac-dc LED driver with a storage capacitor (C STO ). Although this approach offers a near unity power factor and a precisely regulated output voltage, it would be generally more difficult to achieve a high conversion efficiency with the two-stage architecture unless an optimized control in each stage is applied, although efficiencies up to 95% have been reported. Further, this architecture requires several components relatively, resulting in large sizes and considerable costs. To achieve a high power factor and reduce the output LED current ripple, several methods have been proposed. The first approach is to inject odd harmonic signals like the third and the fifth harmonics to the input current for reducing the input current pulsation, sacrificing the input power factor down to 0.9. While the previous studies a reduction in the size of the capacitors, recent studies in and consider the output light flicker characteristics.
PROPOSED SYSTEM:
In this paper, we propose an ac-dc LED driver consisting of two parallel inverted buck converters for reducing light flicker to low-risk levels. To handle the power differences between the twice-line-frequency input power and the constant LED power, one inverted buck converter conveys energy from the ac source to a storage capacitor, simultaneously performing the PFC operation. The other inverted buck converter supplies constant current to the LEDs to maintain a constant brightness. The proposed architecture can achieve an input power factor higher than 0.9. Although the proposed approach offers a lower power factor than the conventional two-stage approach with a boost PFC converter the proposed architecture with two inverted buck converters in parallel significantly reduces the average voltage of C STO to 56.5 V at the input voltage of 110 V rms , whereas the average voltage of C STO in the two-stage must be higher than 155 V. Moreover, the size of C STO is reduced because less than 30% of the output power is initially stored in C STO and then delivered to the LED load. Thus, the reduced voltage stress and size of C STO enables ceramic or film capacitors to be utilized instead of electrolytic capacitors that have lifetime constraints.
CONCLUSION
An ac-dc LED driver that can drive the LEDs with the low risk levels of flicker has been presented in this study. A two parallel inverted buck topology is proposed to achieve a high power factor and a low LED current ripple. The PFC converter buffers the twice-the-line-frequency energy, while simultaneously performing the PFC function and the regulating converter provides a constant current to the LEDs. Further, the proposed architecture reduces the voltage stress and size of the storage capacitor, thereby, a film capacitor can be used instead of the limited life-time electrolytic capacitor. The relationship between the input power factor and the stored energy ratio in accordance with the storage capacitor voltage, to achieve a high power factor and efficiency, is discussed in this study. A 15 W prototype LED driver has been implemented and tested to validate the design of the proposed ac-dc LED driver, exhibiting a power factor of 0.94 and a power efficiency of 85.4%.
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